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lt3080 1 3080fc adjustable1.1a single resistor low dropout regulator the lt ? 3080 is a 1.1a low dropout linear regulator that can be paralleled to increase output current or spread heat in surface mounted boards. architected as a precision cur - rent source and voltage follower allows this new regulator to be used in many applications requiring high current, adjustability to zero, and no heat sink. also the device brings out the collector of the pass transistor to allow low dropout operation down to 350 millivolts when used with multiple supplies. a key feature of the lt3080 is the capability to supply a wide output voltage range. by using a reference current through a single resistor, the output voltage is programmed to any level between zero and 36v. the lt3080 is stable with 2.2f of capacitance on the output, and the ic uses small ceramic capacitors that do not require additional esr as is common with other regulators. internal protection circuitry includes current limiting and thermal limiting. the lt3080 regulator is offered in the 8-lead msop (with an exposed pad for better thermal characteristics), a 3mm 3mm dfn, 5-lead dd-pak, to-220 and a simple-to-use 3-lead sot-223 version. n high current all surface mount supply n high effciency linear regulator n post regulator for switching supplies n low parts count variable v oltage supply n low output voltage power supplies n outputs may be paralleled for higher current and heat spreading n output current: 1.1a n single resistor programs output voltage n 1% initial accuracy of set pin current n output adjustable to 0v n low output noise: 40v rms (10hz to 100khz) n wide input voltage range: 1.2v to 36v n low dropout voltage: 350mv (except sot -223 package) n <1mv load regulation n <0.001%/v line regulation n minimum load current: 0.5ma n stable with 2.2f minimum ceramic output capacitor n current limit with foldback and overtemperature protected n available in 8-lead msop, 3mm 3mm dfn, 5-lead dd-pak, to-220 and 3-lead sot-223 variable output voltage 1.1a supply + ? lt3080 in v in 1.2v to 36v v control out 3080 ta01a set 1f 2.2f r set v out = r set ? 10a v out set pin current distribution set pin current distribution (a) 10.20 3080 g02 9.90 10.00 10.10 9.80 n = 13792 typical a pplica t ion descrip t ion fea t ures a pplica t ions l , lt, ltc, ltm, linear technology and the linear logo are registered trademarks and vldo and thinsot are trademarks of linear technology corporation. all other trademarks are the property of their respective owners.
lt3080 2 3080fc a bsolu t e maxi m u m r a t ings v control pin voltage ..................................... 40v, C0.3v in pin v oltage ................................................ 40v , C0.3v set pin current (note 7) ..................................... 10ma set pin v oltage (relative to out) ......................... 0.3v output short-cir cuit duration .......................... indefnite (note 1)(all voltages relative to v out ) top view 9 out dd package 8-lead (3mm 3mm) plastic dfn 5 6 7 8 4 3 2 1out out out set in in nc v control t jmax = 125c, ja = 64c/w, jc = 3c/w exposed pad (pin 9) is out, must be soldered to pcb 1 2 3 4 out out out set 8 7 6 5 in in nc v control top view ms8e package 8-lead plastic msop 9 out t jmax = 125c, ja = 60c/w, jc = 10c/w exposed pad (pin 9) is out, must be soldered to pcb q package 5-lead plastic dd-pak tab is out front view in v control out set nc 5 4 3 2 1 t jmax = 125c, ja = 30c/w, jc = 3c/w t package 5-lead plastic to-220 in v control out set nc front view 5 4 3 2 1 tab is out t jmax = 125c, ja = 40c/w, jc = 3c/w 3 2 1 front view tab is out in* out set st package 3-lead plastic sot-223 *in is v control and in tied together t jmax = 125c, ja = 55c/w, jc = 15c/w operating junction temperature range (notes 2, 10) e-, i-grades ............................................ C40c to 125c storage t emperature range: .................. C65c to 150c lead t emperature (soldering, 10 sec) ms8e, q, t and st packages only .................... 300c p in c on f igura t ion
lt3080 3 3080fc o r d er i n f or m a t ion lead free finish tape and reel part marking* package description temperature range lt3080edd#pbf lt3080edd#trpbf lcbn 8-lead (3mm x 3mm) plastic dfn C40c to 125c lt3080idd#pbf lt3080idd#trpbf lcbn 8-lead (3mm x 3mm) plastic dfn C40c to 125c lt3080ems8e#pbf lt3080ems8e#trpbf ltcbm 8-lead plastic msop C40c to 125c lt3080ims8e#pbf lt3080ims8e#trpbf ltcbm 8-lead plastic msop C40c to 125c lt3080eq#pbf lt3080eq#trpbf lt3080q 5-lead plastic dd-pak C40c to 125c lt3080iq#pbf lt3080iq#trpbf lt3080q 5-lead plastic dd-pak C40c to 125c lt3080et#pbf lt3080et#trpbf lt3080et 5-lead plastic to-220 C40c to 125c lt3080it#pbf lt3080it#trpbf lt3080et 5-lead plastic to-220 C40c to 125c lt3080est#pbf lt3080est#trpbf 3080 3-lead plastic sot-223 C40c to 125c lt3080ist#pbf lt3080ist#trpbf 3080 3-lead plastic sot-223 C40c to 125c lead based finish tape and reel part marking* package description temperature range lt3080edd lt3080edd#tr lcbn 8-lead (3mm x 3mm) plastic dfn C40c to 125c lt3080idd lt3080idd#tr lcbn 8-lead (3mm x 3mm) plastic dfn C40c to 125c lt3080ems8e lt3080ems8e#tr ltcbm 8-lead plastic msop C40c to 125c lt3080ims8e lt3080ims8e#tr ltcbm 8-lead plastic msop C40c to 125c lt3080eq lt3080eq#tr lt3080q 5-lead plastic dd-pak C40c to 125c lt3080iq lt3080iq#tr lt3080q 5-lead plastic dd-pak C40c to 125c lt3080et lt3080et#tr lt3080et 5-lead plastic to-220 C40c to 125c lt3080it lt3080it#tr lt3080et 5-lead plastic to-220 C40c to 125c lt3080est lt3080est#tr 3080 3-lead plastic sot-223 C40c to 125c lt3080ist lt3080ist#tr 3080 3-lead plastic sot-223 C40c to 125c consult ltc marketing for parts specifed with wider operating temperature ranges. *the temperature grade is identifed by a label on the shipping container. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel specifcations, go to: http://www.linear.com/tapeandreel/
lt3080 4 3080fc parameter conditions min typ max units set pin current i set v in = 1v, v control = 2.0v, i load = 1ma, t j = 25c v in 1v, v control 2.0v, 1ma i load 1.1a (note 9) l 9.90 9.80 10 10 10.10 10.20 a a output offset voltage (v out C v set ) v in = 1v, v control = 2v, i out = 1ma v os dfn and msop package l C2 C3.5 2 3.5 mv mv sot-223, dd-pak and t0-220 package l C5 C6 5 6 mv mv load regulation i set v os i load = 1ma to 1.1a i load = 1ma to 1.1a (note 8) l C0.1 0.6 1.3 na mv line regulation (note 9) dfn and msop package i set v os v in = 1v to 25v, v control = 2v to 25v, i load = 1ma v in = 1v to 25v, v control = 2v to 25v, i load = 1ma l 0.1 0.003 0.5 na/v mv/v line regulation (note 9) sot-223, dd-pak and t0-220 package i set v os v in = 1v to 26v, v control = 2v to 26v, i load = 1ma v in = 1v to 26v, v control = 2v to 26v, i load = 1ma l 0.1 0.003 0.5 na/v mv/v minimum load current (notes 3, 9) v in = v control = 10v v in = v control = 25v (dfn and msop package) v in = v control = 26v (sot-223, dd-pak and t0-220 package) l l l 300 500 1 1 a ma ma v control dropout voltage (note 4) i load = 100ma i load = 1.1a l 1.2 1.35 1.6 v v v in dropout voltage (note 4) i load = 100ma i load = 1.1a l l 100 350 200 500 mv mv v control pin current i load = 100ma i load = 1.1a l l 4 17 6 30 ma ma current limit v in = 5v, v control = 5v, v set = 0v, v out = C0.1v l 1.1 1.4 a error amplifer rms output noise (note 6) i load = 1.1a, 10hz f 100khz, c out = 10f, c set = 0.1f 40 v rms reference current rms output noise (note 6) 10hz f 100khz 1 na rms ripple rejection f = 120hz, v ripple = 0.5v p-p , i load = 0.2a, c set = 0.1f, c out = 2.2f f = 10khz f = 1mhz 75 55 20 db db db thermal regulation, i set 10ms pulse 0.003 %/w note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: unless otherwise specifed, all voltages are with respect to v out . the lt3080 is tested and specifed under pulse load conditions such that t j ? t a . the lt3080e is tested at t a = 25c. performance of the lt3080e over the full C40c and 125c operating temperature range is assured by design, characterization, and correlation with statistical process controls. the lt3080i is guaranteed over the full C40c to 125c operating junction temperature range. note 3: minimum load current is equivalent to the quiescent current of the part. since all quiescent and drive current is delivered to the output of the part, the minimum load current is the minimum current required to maintain regulation. note 4: for the lt3080, dropout is caused by either minimum control voltage (v control ) or minimum input voltage (v in ). both parameters are specifed with respect to the output voltage. the specifcations represent the minimum input-to-output differential voltage required to maintain regulation. note 5: the v control pin current is the drive current required for the output transistor. this current will track output current with roughly a 1:60 ratio. the minimum value is equal to the quiescent current of the device. note 6: output noise is lowered by adding a small capacitor across the voltage setting resistor. adding this capacitor bypasses the voltage setting resistor shot noise and reference current noise; output noise is then equal to error amplifer noise (see applications information section). note 7: set pin is clamped to the output with diodes. these diodes only carry current under transient overloads. note 8: load regulation is kelvin sensed at the package. note 9: current limit may decrease to zero at input-to-output differential voltages (v in Cv out ) greater than 25v (dfn and msop package) or 26v (sot-223, dd-pak and t0-220 package). operation at voltages for both in and v control is allowed up to a maximum of 36v as long as the difference between input and output voltage is below the specifed differential (v in Cv out ) voltage. line and load regulation specifcations are not applicable when the device is in current limit. note 10: this ic includes overtemperature protection that is intended to protect the device during momentary overload conditions. junction temperature will exceed the maximum operating junction temperature when overtemperature protection is active. continuous operation above the specifed maximum operating junction temperature may impair device reliability. note 11: the sot-223 package connects the in and v control pins together internally. therefore, test conditions for this pin follow the v control conditions listed in the electrical characteristics table. e lec t rical c harac t eris t ics the l denotes the specifcations which apply over the full operating temperature range, otherwise specifcations are at t a = 25c. (note 11)
lt3080 5 3080fc set pin current set pin current distribution offset voltage (v out C v set ) offset voltage offset voltage load regulation minimum load current dropout voltage (minimum in voltage) temperature (c) ?50 set pin current (a) 10.00 10.10 150 3080 g01 9.90 9.80 0 50 100 ?25 25 75 125 10.20 9.95 10.05 9.85 10.15 set pin current distribution (a) 10.20 3080 g02 9.90 10.00 10.10 9.80 n = 13792 temperature (c) ?50 offset voltage (mv) 0 1.0 150 3080 g03 ?1.0 ?2.0 0 50 100 ?25 25 75 125 2.0 ?0.5 0.5 ?1.5 1.5 i l = 1ma v os distribution (mv) 2 3080 g04 ?1 0 1 ?2 n = 13250 input-to-output voltage (v) 0 offset voltage (mv) ?0.25 0 0.25 18 30 3080 g05 ?0.50 ?0.75 ?1.00 6 12 24 0.50 0.75 1.00 36* i load = 1ma *see note 9 in electrical characteristics table load current (a) 0 offset voltage (mv) ?1.00 ?0.75 ?0.50 0.6 1.0 3080 g06 ?1.25 ?1.50 ?1.75 0.2 0.4 0.8 ?0.25 0 0.25 1.2 t j = 25c t j = 125c temperature (c) ?50 change in offset voltage with load (mv) change in reference current with load (na) ?0.4 ?0.2 150 3080 g07 ?0.6 ?0.8 0 50 100 ?25 25 75 125 0 ?0.5 ?0.3 ?0.7 ?0.1 ?20 0 ?40 ?60 20 ?30 ?10 ?50 10 ?i load = 1ma to 1.1a v in ? v out = 2v change in reference current change in offset voltage (v out ? v set ) temperature (c) ?50 minimum load current (ma) 0.4 0.6 150 3080 g08 0.2 0 0 50 100 ?25 25 75 125 0.8 0.3 0.5 0.1 0.7 v in, control ? v out = 36v* v in, control ? v out = 1.5v *see note 9 in electrical characteristics table output current (a) 0 minimum in voltage (v in ? v out ) (mv) 150 200 250 0.6 1.0 3080 g09 100 50 0 0.2 0.4 0.8 300 350 400 1.2 t j = 25c t j = 125c offset voltage distribution typical p er f or m ance c harac t eris t ics
lt3080 6 3080fc typical p er f or m ance c harac t eris t ics time (s) 0 output voltage deviation (mv) load current (ma) ?25 25 75 40 3080 g15 400 200 ?50 0 50 300 100 0 105 2015 30 35 45 25 50 v out = 1.5v c set = 0.1f v in = v control = 3v c out = 10f ceramic c out = 2.2f ceramic dropout voltage (minimum in voltage) dropout voltage (minimum v control pin voltage) dropout voltage (minimum v control pin voltage) current limit load transient response temperature (c) ?50 minimum in voltage (v in ? v out ) (mv) 200 300 150 3080 g10 100 0 0 50 100 ?25 25 75 125 400 150 250 50 350 i load = 1.1a i load = 500ma i load = 100ma output current (a) 0 minimum control voltage (v control ? v out ) (v) 0.6 0.8 1.0 0.6 1.0 3080 g11 0.4 0.2 0 0.2 0.4 0.8 1.2 1.4 1.6 1.2 t j = 125c t j = ?50c t j = 25c temperature (c) ?50 minimum control voltage (v control ? v out ) (v) 0.8 1.2 150 3080 g12 0.4 0 0 50 100 ?25 25 75 125 1.6 0.6 1.0 0.2 1.4 i load = 1.1a i load = 1ma current limit temperature (c) ?50 current limit (a) 0.8 1.2 150 3080 g13 0.4 0 0 50 100 ?25 25 75 125 1.6 0.6 1.0 0.2 1.4 v in = 7v v out = 0v input-to-output differential (v) 0 current limit (a) 0.6 0.8 1.0 18 30 3080 g14 0.4 0.2 0 6 12 24 1.2 1.4 1.6 36* sot-223, dd-pak and to-220 msop and dfn t j = 25c *see note 9 in electrical characteristics table time (s) 0 output voltage deviation (mv) load current (a) ?50 50 150 40 3080 g16 1.2 0.6 ?100 0 100 0.9 0.3 0 105 2015 30 35 45 25 50 v in = v control = 3v v out = 1.5v c out = 10f ceramic c set = 0.1f load transient response line transient response time (s) 0 in/control voltage (v) output voltage deviation (mv) ?25 25 75 80 3080 g17 6 4 ?50 0 50 5 3 2 2010 4030 60 70 90 50 100 v out = 1.5v i load = 10ma c out = 2.2f ceramic c set = 0.1f ceramic turn-on response time (s) 0 output voltage (v) input voltage (v) 1 3 5 8 3080 g18 2.0 1.0 0 2 4 1.5 0.5 0 21 43 6 7 9 5 10 r set = 100k c set = 0 r load = 1 c out = 2.2f ceramic
lt3080 7 3080fc typical p er f or m ance c harac t eris t ics v control pin current residual output voltage with less than minimum load ripple rejection, single supply ripple rejection, dual supply, in pin ripple rejection, dual supply, v control pin v control pin current ripple rejection (120hz) noise spectral density input-to-output differential (v) 0 0 control pin current (ma) 5 10 15 20 25 6 12 18 24 3080 g19 30 36* i load = 1.1a i load = 1ma device in current limit *see note 9 in electrical characteristics table load current (a) 0 0 control pin current (ma) 5 10 15 20 30 0.2 0.4 0.6 0.8 3080 g20 1.0 1.2 25 v control ? v out = 2v v in ? v out = 1v t j = ?50c t j = 125c t j = 25c r test () 0 output voltage (v) 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 3080 g21 2k 1k v in = 20v v in = 5v set pin = 0v v in v out r test v in = 10v frequency (hz) 0 ripple rejection (db) 40 100 10k 100k 10010 1k 1m 3080 g22 20 60 80 30 90 10 50 70 v in = v control = v out (nominal) + 2v ripple = 50mv p-p c out = 2.2f ceramic i load = 100ma i load = 1.1a frequency (hz) 0 ripple rejection (db) 40 100 10k 100k 10010 1k 1m 3080 g23 20 60 80 30 90 10 50 70 v in = v out (nominal) + 1v v control = v out (nominal) +2v c out = 2.2f ceramic ripple = 50mv p-p i load = 100ma i load = 1.1a frequency (hz) 0 ripple rejection (db) 40 100 10k 100k 10010 1k 1m 3080 g24 20 60 80 30 90 10 50 70 v in = v out (nominal) + 1v v control = v out (nominal) +2v ripple = 50mv p-p c out = 2.2f ceramic i load = 1.1a temperature (c) ?50 70 ripple rejection (db) 71 73 74 75 80 77 0 50 75 3080 g25 72 78 79 76 ?25 25 100 125 150 single supply operation v in = v out(nominal) + 2v ripple = 500mv p-p , f = 120hz i load = 1.1a c set = 0.1f, c out = 2.2f frequency (hz) 1 error amplifier noise spectral density (nv/hz) reference current noise spectral density (pa/ hz) 10k 10k 100k 100 10 1k 3080 g26 100 10 1k 0.1 1k 10 1.0 100
lt3080 8 3080fc typical p er f or m ance c harac t eris t ics output voltage noise error amplifer gain and phase v control (pin 5/pin 5/pin 4/pin 4/na): this pin is the supply pin for the control circuitry of the device. the cur - rent fow into this pin is about 1.7% of the output current. for the device to regulate, this voltage must be more than 1.2v to 1.35v greater than the output voltage (see dropout specifcations). in (pins 7, 8/pins 7, 8/pin 5/pin 5/pin 3): this is the collector to the power device of the lt3080. the output load current is supplied through this pin. for the device to regulate, the voltage at this pin must be more than 0.1v to 0.5v greater than the output voltage (see dropout specifcations). nc (pin 6/pin 6/pin 1/pin 1/na): no connection. no con- nect pins have no connection to internal circuitry and may be tied to v in , v control , v out , gnd or foated. out (pins 1-3/pins 1-3/pin 3/pin 3/pin 2): this is the power output of the device. there must be a minimum load current of 1ma or the output may not regulate. set (pin 4/pin 4/pin 2/pin 2/pin 1): this pin is the input to the error amplifer and the regulation set point for the device. a fxed current of 10a fows out of this pin through a single external resistor, which programs the output voltage of the device. output voltage range is zero to the absolute maximum rated output voltage. transient performance can be improved by adding a small capacitor from the set pin to ground. exposed pad (pin 9/pin 9/na/na/na): out on ms8e and dfn packages. tab: out on dd-pak, to-220 and sot-223 packages. p in func t ions (dd/ms8e/q/t/st) v out 100v/div time 1ms/div 3080 g27 v out = 1v r set = 100k c set = o.1f c out = 10f i load = 1.1a frequency (hz) ?30 gain (db) phase (degrees) ?10 20 10k 100k 100 10 1k 1m 3080 g28 ?20 0 10 ?15 15 ?25 ?5 5 ?200 0 300 ?100 100 200 ?50 250 ?150 50 150 i l = 1.1a i l = 100ma i l = 100ma i l = 1.1a
lt3080 9 3080fc the lt3080 regulator is easy to use and has all the pro - tection features expected in high performance regulators. included are short-circuit protection and safe operating area protection, as well as thermal shutdown. the lt3080 is especially well suited to applications needing multiple rails. the new architecture adjusts down to zero with a single resistor handling modern low voltage digital ics as well as allowing easy parallel operation and thermal management without heat sinks. adjusting to zero output allows shutting off the powered circuitry and when the input is pre-regulatedsuch as a 5v or 3.3v input supply external resistors can help spread the heat. a precision 0 tc 10a internal current source is con - nected to the noninverting input of a power operational amplifer. the power operational amplifer provides a low impedance buffered output to the voltage on the noninvert- ing input. a single resistor from the noninverting input to ground sets the output voltage and if this resistor is set to zero, zero output results. as can be seen, any output voltage can be obtained from zero up to the maximum defned by the input power supply. what is not so obvious from this architecture are the ben - efts of using a true internal current source as the reference as opposed to a bootstrapped reference in older regulators. a true current source allows the regulator to have gain and frequency response independent of the impedance on the positive input. older adjustable regulators, such as the lt1086 have a change in loop gain with output voltage as well as bandwidth changes when the adjustment pin is bypassed to ground. for the lt3080, the loop gain is unchanged by changing the output voltage or bypassing. output regulation is not fxed at a percentage of the output voltage but is a fxed fraction of millivolts. use of a true current source allows all the gain in the buffer amplifer to provide regulation and none of that gain is needed to amplify up the reference to a higher output voltage. the lt3080 has the collector of the output transistor connected to a separate pin from the control input. since the dropout on the collector (in pin) is only 350mv, two supplies can be used to power the lt3080 to reduce dis - sipation: a higher voltage supply for the control circuitry and a lower voltage supply for the collector. this increases effciency and reduces dissipation. to further spread the heat, a resistor can be inserted in series with the collector to move some of the heat out of the ic and spread it on the pc board. the lt3080 can be operated in two modes. three-terminal mode has the control pin connected to the power input pin which gives a limitation of 1.35v dropout. alternatively, the control pin can be tied to a higher voltage and the power in pin to a lower voltage giving 350mv dropout on the in pin and minimizing the power dissipation. this allows for a 1.1a supply regulating from 2.5v in to 1.8v out or 1.8v in to 1.2v out with low dissipation. ? + v control in 10a 3080 bd out set b lock diagra m a pplica t ions i n f or m a t ion
lt3080 10 3080fc figure 1. basic adjustable regulator + ? lt3080 in v control v control out 3080 f01 set c out r set v out c set + v in + output voltage the lt3080 generates a 10a reference current that fows out of the set pin. connecting a resistor from set to ground generates a voltage that becomes the reference point for the error amplifer (see figure 1). the reference voltage is a straight multiplication of the set pin current and the value of the resistor. any voltage can be generated and there is no minimum output voltage for the regulator. a minimum load current of 1ma is required to maintain regulation regardless of output voltage. for true zero voltage output operation, this 1ma load current must be returned to a negative supply voltage. with the low level current used to generate the reference voltage, leakage paths to or from the set pin can create errors in the reference and output voltages. high quality insulation should be used (e.g., tefon, kel-f); cleaning of all insulating surfaces to remove fuxes and other resi - dues will probably be required. surface coating may be necessary to provide a moisture barrier in high humidity environments. board leakage can be minimized by encircling the set pin and circuitry with a guard ring operated at a potential close to itself; the guard ring should be tied to the out pin. guarding both sides of the circuit board is required. bulk leakage reduction depends on the guard ring width. ten nanoamperes of leakage into or out of the set pin and associated circuitry creates a 0.1% error in the reference voltage. leakages of this magnitude, coupled with other sources of leakage, can cause signifcant offset voltage and reference drift, especially over the possible operating temperature range. if guardring techniques are used, this bootstraps any stray capacitance at the set pin. since the set pin is a high impedance node, unwanted signals may couple into the set pin and cause erratic behavior. this will be most noticeable when operating with minimum output capacitors at full load current. the easiest way to remedy this is to bypass the set pin with a small amount of capacitance from set to ground, 10pf to 20pf is suffcient. stability and output capacitance the lt3080 requires an output capacitor for stability. it is designed to be stable with most low esr capacitors (typically ceramic, tantalum or low esr electrolytic). a minimum output capacitor of 2.2f with an esr of 0.5 or less is recommended to prevent oscillations. larger values of output capacitance decrease peak deviations and provide improved transient response for larger load current changes. bypass capacitors, used to decouple individual components powered by the lt3080, increase the effective output capacitor value. for improvement in transient performance, place a capaci - tor across the voltage setting resistor. capacitors up to 1f can be used. this bypass capacitor reduces system noise as well, but start-up time is proportional to the time constant of the voltage setting resistor (r set in figure 1) and set pin bypass capacitor. extra consideration must be given to the use of ceramic capacitors. ceramic capacitors are manufactured with a variety of dielectrics, each with different behavior across temperature and applied voltage. the most common dielectrics used are specifed with eia temperature char - acteristic codes of z5u, y5v, x5r and x7r. the z5u and y5v dielectrics are good for providing high capacitances in a small package, but they tend to have strong volt- age and temperature coeffcients as shown in figures 2 and 3. when used with a 5v regulator, a 16v 10f y5v capacitor can exhibit an effective value as low as 1f to 2f for the dc bias voltage applied and over the operating temperature range. the x5r and x7r dielectrics result in more stable characteristics and are more suitable for use as the output capacitor. the x7r type has better stability across temperature, while the x5r is less expensive and is a pplica t ions i n f or m a t ion
lt3080 11 3080fc available in higher values. care still must be exercised when using x5r and x7r capacitors; the x5r and x7r codes only specify operating temperature range and maximum capacitance change over temperature. capacitance change due to dc bias with x5r and x7r capacitors is better than y5v and z5u capacitors, but can still be signifcant enough to drop capacitor values below appropriate levels. capaci - tor dc bias characteristics tend to improve as component case size increases, but expected capacitance at operating voltage should be verifed. voltage and temperature coeffcients are not the only sources of problems. some ceramic capacitors have a piezoelectric response. a piezoelectric device generates voltage across its terminals due to mechanical stress, similar to the way a piezoelectric microphone works. for a ceramic capacitor the stress can be induced by vibrations in the system or thermal transients. paralleling devices lt3080s may be paralleled to obtain higher output current. the set pins are tied together and the in pins are tied together. this is the same whether its in three terminal mode or has separate input supplies. the outputs are connected in common using a small piece of pc trace as a ballast resistor to equalize the currents. pc trace resistance in milliohms/inch is shown in table 1. only a tiny area is needed for ballasting. table 1. pc board trace resistance weight (oz) 10 mil width 20 mil width 1 54.3 27.1 2 27.1 13.6 trace resistance is measured in mohms/in the worse case offset between the set pin and the output of only 2 millivolts allows very small ballast resistors to be used. as shown in figure 4, the two devices have a small 10 milliohm ballast resistor, which at full output current gives better than 80 percent equalized sharing of the current. the external resistance of 10 milliohms + ? lt3080 v in v control out set 10m + ? lt3080 v in v in 4.8v to 28v v out 3.3v 2a v control out 10f 1f set 165k 3080 f04 10m figure 4. parallel devices a pplica t ions i n f or m a t ion dc bias voltage (v) change in value (%) 3080 f02 20 0 ?20 ?40 ?60 ?80 ?100 0 4 8 10 2 6 12 14 x5r y5v 16 both capacitors are 16v, 1210 case size, 10f figure 2. ceramic capacitor dc bias characteristics temperature (c) ?50 40 20 0 ?20 ?40 ?60 ?80 ?100 25 75 3080 f03 ?25 0 50 100 125 y5v change in value (%) x5r both capacitors are 16v, 1210 case size, 10f figure 3. ceramic capacitor temperature characteristics
lt3080 12 3080fc (5 milliohms for the two devices in parallel) only adds about 10 millivolts of output regulation drop at an output of 2a. even with an output voltage as low as 1v, this only adds 1% to the regulation. of course, more than two lt3080s can be paralleled for even higher output current. they are spread out on the pc board, spreading the heat. input resistors can further spread the heat if the input-to-output difference is high. thermal performance in this example, two lt3080 3mm 3mm dfn devices are mounted on a 1oz copper 4-layer pc board. they are placed approximately 1.5 inches apart and the board is mounted vertically for convection cooling. two tests were set up to measure the cooling performance and current sharing of these devices. the frst test was done with approximately 0.7v input- to-output and 1a per device. this gave a 700 milliwatt dissipation in each device and a 2a output current. the temperature rise above ambient is approximately 28c and both devices were within plus or minus 1c. both the thermal and electrical sharing of these devices is excel - lent. the thermograph in figure 5 shows the temperature distribution between these devices and the pc board reaches ambient temperature within about a half an inch from the devices. the power is then increased with 1.7v across each device. this gives 1.7 watts dissipation in each device and a device temperature of about 90c, about 65c above ambient as shown in figure 6. again, the temperature matching between the devices is within 2c, showing excellent tracking between the devices. the board temperature has reached approximately 40c within about 0.75 inches of each device. while 90c is an acceptable operating temperature for these devices, this is in 25c ambient. for higher ambients, the temperature must be controlled to prevent device tempera- ture from exceeding 125c. a 3-meter-per-second airfow across the devices will decrease the device temperature about 20c providing a margin for higher operating ambi- ent temperatures. both at low power and relatively high power levels de- vices can be paralleled for higher output current. current sharing and thermal sharing is excellent, showing that acceptable operation can be had while keeping the peak temperatures below excessive operating temperatures on a board. this technique allows higher operating current linear regulation to be used in systems where it could never be used before. quieting the noise the lt3080 offers numerous advantages when it comes to dealing with noise. there are several sources of noise in a linear regulator. the most critical noise source for any ldo is the reference; from there, the noise contribution figure 6. temperature rise at 1.7w dissipation figure 5. temperature rise at 700mw dissipation a pplica t ions i n f or m a t ion
lt3080 13 3080fc from the error amplifer must be considered, and the gain created by using a resistor divider cannot be forgotten. traditional low noise regulators bring the voltage refer - ence out to an external pin (usually through a large value resistor) to allow for bypassing and noise reduction of reference noise. the lt3080 does not use a traditional voltage reference like other linear regulators, but instead uses a reference current. that current operates with typi- cal noise current levels of 3.2pa/ hz (1na rms over the 10hz to 100khz bandwidth). the voltage noise of this is equal to the noise current multiplied by the resistor value. the resistor generates spot noise equal to 4ktr (k = boltzmanns constant, 1.38 ? 10 C23 j/k, and t is absolute temperature) which is rms summed with the reference current noise. to lower reference noise, the voltage setting resistor may be bypassed with a capacitor, though this causes start-up time to increase as a factor of the rc time constant. the lt3080 uses a unity-gain follower from the set pin to drive the output, and there is no requirement to use a resistor to set the output voltage. use a high accuracy voltage reference placed at the set pin to remove the er - rors in output voltage due to reference current tolerance and resistor tolerance. active driving of the set pin is acceptable; the limitations are the creativity and ingenuity of the circuit designer. one problem that a normal linear regulator sees with refer - ence voltage noise is that noise is gained up along with the output when using a resistor divider to operate at levels higher than the normal reference voltage. with the lt3080, the unity-gain follower presents no gain whatsoever from the set pin to the output, so noise fgures do not increase accordingly. error amplifer noise is typically 125nv/ hz (40v rms over the 10hz to 100khz bandwidth); this is another factor that is rms summed in to give a fnal noise fgure for the regulator. curves in the typical performance characteristics show noise spectral density and peak-to-peak noise character - istics for both the reference current and error amplifer over the 10hz to 100khz bandwidth. overload recovery like many ic power regulators, the lt3080 has safe operat - ing area (soa) protection. the soa protection decreases current limit as the input-to-output voltage increases and keeps the power dissipation at safe levels for all values of input-to-output voltage. the lt3080 provides some output current at all values of input-to-output voltage up to the device breakdown. see the current limit curve in the typical performance characteristics. when power is frst turned on, the input voltage rises and the output follows the input, allowing the regulator to start into very heavy loads. during start-up, as the input voltage is rising, the input-to-output voltage differential is small, allowing the regulator to supply large output currents. with a high input voltage, a problem can occur wherein removal of an output short will not allow the output volt- age to recover. other regulators, such as the lt1085 and lt1764a, also exhibit this phenomenon so it is not unique to the lt3080. the problem occurs with a heavy output load when the input voltage is high and the output voltage is low. com - mon situations are immediately after the removal of a short circuit. the load line for such a load may intersect the output current curve at two points. if this happens, there are two stable operating points for the regulator. with this double intersection, the input power supply may need to be cycled down to zero and brought up again to make the output recover. load regulation because the lt3080 is a foating device (there is no ground pin on the part, all quiescent and drive current is delivered to the load), it is not possible to provide true remote load sensing. load regulation will be limited by the resistance figure 7. connections for best load regulation + ? lt3080 in v control out 3080 f07 set r set r p parasitic resistance r p r p load a pplica t ions i n f or m a t ion
lt3080 14 3080fc table 2. mse package, 8-lead msop copper area thermal resistance (junction-to-ambient) topside* backside board area 2500mm 2 2500mm 2 2500mm 2 55c/w 1000mm 2 2500mm 2 2500mm 2 57c/w 225mm 2 2500mm 2 2500mm 2 60c/w 100mm 2 2500mm 2 2500mm 2 65c/w *device is mounted on topside table 3. dd package, 8-lead dfn copper area thermal resistance (junction-to-ambient) topside* backside board area 2500mm 2 2500mm 2 2500mm 2 60c/w 1000mm 2 2500mm 2 2500mm 2 62c/w 225mm 2 2500mm 2 2500mm 2 65c/w 100mm 2 2500mm 2 2500mm 2 68c/w *device is mounted on topside table 4. st package, 3-lead sot-223 copper area thermal resistance (junction-to-ambient) topside* backside board area 2500mm 2 2500mm 2 2500mm 2 48c/w 1000mm 2 2500mm 2 2500mm 2 48c/w 225mm 2 2500mm 2 2500mm 2 56c/w 100mm 2 2500mm 2 2500mm 2 62c/w *device is mounted on topside table 5. q package, 5-lead dd-pak copper area thermal resistance (junction-to-ambient) topside* backside board area 2500mm 2 2500mm 2 2500mm 2 25c/w 1000mm 2 2500mm 2 2500mm 2 30c/w 125mm 2 2500mm 2 2500mm 2 35c/w *device is mounted on topside t package, 5-lead to-220 thermal resistance (junction-to-case) = 3c/w calculating junction temperature example: given an output voltage of 0.9v, a v control voltage of 3.3v 10%, an in voltage of 1.5v 5%, output current range from 1ma to 1a and a maximum ambient temperature of 50c, what will the maximum junction temperature be for the dfn package on a 2500mm 2 board with topside copper area of 500mm 2 ? of the connections between the regulator and the load. the data sheet specifcation for load regulation is kelvin sensed at the pins of the package. negative side sensing is a true kelvin connection, with the bottom of the voltage setting resistor returned to the negative side of the load (see figure 7). connected as shown, system load regula- tion will be the sum of the lt3080 load regulation and the parasitic line resistance multiplied by the output current. it is important to keep the positive connection between the regulator and load as short as possible and use large wire or pc board traces. thermal considerations the lt3080 has internal power and thermal limiting cir - cuitry designed to protect it under overload conditions. for continuous normal load conditions, maximum junc- tion temperature must not be exceeded. it is important to give consideration to all sources of thermal resistance from junction to ambient. this includes junction-to-case, case-to-heat sink interface, heat sink resistance or circuit board-to-ambient as the application dictates. additional heat sources nearby must also be considered. for surface mount devices, heat sinking is accomplished by using the heat spreading capabilities of the pc board and its copper traces. surface mount heat sinks and plated through-holes can also be used to spread the heat gener - ated by power devices. junction-to-case thermal resistance is specifed from the ic junction to the bottom of the case directly below the die. this is the lowest resistance path for heat fow. proper mounting is required to ensure the best possible thermal fow from this area of the package to the heat sinking material. for the to-220 package, thermal compound is strongly recommended for mechanical connections to a heat sink. a thermally conductive spacer can be used for electrical isolation as long as the added contribution to thermal resistance is considered. note that the tab or exposed pad (depending on package) is electrically connected to the output. the following tables list thermal resistance for several different copper areas given a fxed board size. all mea- surements were taken in still air on two-sided 1/16 fr-4 board with one ounce copper. a pplica t ions i n f or m a t ion
lt3080 15 3080fc the power in the drive circuit equals: p drive = (v control C v out )(i control ) where i control is equal to i out /60. i control is a function of output current. a curve of i control vs i out can be found in the typical performance characteristics curves. the power in the output transistor equals: p output = (v in C v out )(i out ) the total power equals: p total = p drive + p output the current delivered to the set pin is negligible and can be ignored. v control(max continuous) = 3.630v (3.3v + 10%) v in(max continuous) = 1.575v (1.5v + 5%) v out = 0.9v, i out = 1a, t a = 50c power dissipation under these conditions is equal to: pdrive = (v control C v out )(i control ) i control = i out 60 = 1a 60 = 17ma p drive = (3.630v C 0.9v)(17ma) = 46mw p output = (v in C v out )(i out ) p output = (1.575v C 0.9v)(1a) = 675mw total power dissipation = 721mw junction t emperature will be equal to: t j = t a + p total ? ja (approximated using tables) t j = 50c + 721mw ? 64c/w = 96c in this case, the junction temperature is below the maxi- mum rating, ensuring reliable operation. reducing power dissipation in some applications it may be necessary to reduce the power dissipation in the lt3080 package without sacrifcing output current capability. two techniques are available. the frst technique, illustrated in figure 8, em- ploys a resistor in series with the regulators input. the voltage drop across r s decreases the lt3080s in-to-out differential voltage and correspondingly decreases the lt3080s power dissipation. as an example, assume: v in = v control = 5v, v out = 3.3v and i out(max) = 1a. use the formulas from the calculating junction temperature section previously discussed. without series resistor r s , power dissipation in the lt3080 equals: p total = 5v C 3.3v ( ) ? 1a 60 ? ? ? ? ? ? + 5v C 3.3v ( ) ? 1a = 1.73w if the voltage differential (v diff ) across the npn pass transistor is chosen as 0.5v, then r s equals: r s = 5v C 3.3v ? 0.5v 1a = 1.2 ? power dissipation in the lt3080 now equals: p total = 5v C 3.3v ( ) ? 1a 60 ? ? ? ? ? ? + 0.5v ( ) ? 1a = 0.53w the lt3080s power dissipation is now only 30% compared to no series resistor. r s dissipates 1.2w of power. choose appropriate wattage resistors to handle and dissipate the power properly. figure 8. reducing power dissipation using a series resistor + ? lt3080 in v control out v out v in ? v in c2 3080 f08 set r set r s c1 a pplica t ions i n f or m a t ion
lt3080 16 3080fc the second technique for reducing power dissipation, shown in figure 9, uses a resistor in parallel with the lt3080. this resistor provides a parallel path for current fow, reducing the current fowing through the lt3080. this technique works well if input voltage is reasonably constant and output load current changes are small. this technique also increases the maximum available output current at the expense of minimum load requirements. as an example, assume: v in = v control = 5v, v in(max) = 5.5v, v out = 3.3v, v out(min) = 3.2v, i out(max) = 1a and i out(min) = 0.7a. also, assuming that r p carries no more than 90% of i out(min) = 630ma. calculating r p yields: r p = 5.5v C 3.2v 0.63a = 3.65 ? (5% standard value = 3.6) the maximum total power dissipation is (5.5v C 3.2v) ? 1a = 2.3w. however the lt3080 supplies only: 1a C 5.5v C 3.2v 3.6 ? = 0.36a therefore, the lt3080s power dissipation is only: p dis = (5.5v C 3.2v) ? 0.36a = 0.83w r p dissipates 1.47w of power. as with the frst technique, choose appropriate wattage resistors to handle and dis- sipate the power properly. with this confguration, the lt3080 supplies only 0.36a. therefore, load current can increase by 0.64a to 1.64a while keeping the lt3080 in its normal operating range. figure 9. reducing power dissipation using a parallel resistor + ? lt3080 in v control out v out v in c2 3080 f09 set r set r p c1 a pplica t ions i n f or m a t ion
lt3080 17 3080fc higher output current adding shutdown current source low dropout voltage led driver + ? lt3080 in 50 mj4502 v control out 3080 ta02 set 4.7f 332k v out 3.3v 5a + 1f 100f + 100f v in 6v + ? lt3080 in v control out 1 100k 3080 ta03 set i out 0a to 1a 4.7f v in 10v 1f + ? lt3080 in 100ma d1 v control out v in 3080 ta05 set r1 24.9k r2 2.49 c1 + ? lt3080 in v in v control out v out 3080 ta04 set 1n4148 r1 on off shutdown q1 vn2222ll q2* vn2222ll q2 insures zero output in the absence of any output load. * using a lower value set resistor + ? lt3080 in 1ma v in 12v v control out c out 4.7f v out 0.5v to 10v 3080 ta06 set r1 49.9k 1% r set 10k r2 499 1% c1 1f v out = 0.5v + 1ma ? r set typical a pplica t ions
lt3080 18 3080fc adding soft-start coincident tracking typical a pplica t ions + ? lt3080 + ? lt3080 in in v in 12v to 18v v control v control out out 4.7f 100f v out 0v to 10v 3080 ta09 set set + 15f r4 1meg 1 100k 0a to 1a + 15f + lab supply + ? lt3080 in v control out 4.7f v out3 5v set c3 4.7f + ? lt3080 in v control out v out2 3.3v 3080 ta07 set r2 80.6k 169k c2 4.7f c1 1.5f + ? lt3080 in v control v in 7v to 28v out set r1 249k v out1 2.5v 1a + ? lt3080 in v in 4.8v to 28v v control out v out 3.3v 1a c out 4.7f 3080 ta08 set r1 332k c2 0.01f c1 1f d1 1n4148
lt3080 19 3080fc high voltage regulator ramp generator + ? lt3080 6.1v in 1n4148 v in 50v v control out v out 1a v out = 20v v out = 10a ? r set 3080 ta10 set r set 2meg 4.7f 15f 10f buz11 10k + + ground clamp reference buffer + ? lt3080 in v in v control out 4.7f v out v ext 3080 ta13 1n4148 5k 20 1f boosting fixed output regulators typical a pplica t ions + ? lt3080 in v in 5v v control out v out 3080 ta11 set 1n4148 vn2222ll vn2222ll 4.7f 1f 1f + ? lt3080 in v in v control out v out * 3080 ta12 set output input c1 1f gnd c2 4.7f lt1019 *min load 0.5ma 3080 ta14 20m 20m 42* 47f 3.3v out 2.6a 33k *4mv drop ensures lt3080 is off with no load multiple lt3080?s can be used + ? lt3080 10f 5v out set lt1963-3.3
lt3080 20 3080fc low voltage, high current adjustable high effciency regulator* typical a pplica t ions 2.7v to 5.5v ? 2 100f 2.2meg 100k 470pf 10k 1000pf 2 100f 294k 12.1k 0.47h 78.7k 100k 124k pv in sw 2n3906 sv in i th r t v fb sync/mode pgood run/ss sgnd pgnd ltc3414 + ? lt3080 in v control out set + ? lt3080 in v control out 0v to 4v ? 4a set + ? lt3080 in v control out set 3080 ta15 + ? lt3080 in v control out 100f set + + + *differential voltage on lt3080 is 0.6v set by the v be of the 2n3906 pnp. 20m 20m 20m 20m ? maximum output voltage is 1.5v below input voltage
lt3080 21 3080fc adjustable high effciency regulator* 2 terminal current source typical a pplica t ions 3080 ta16 4.5v to 25v ? 10f 100k 0.1f 68f 10h mbrm140 10k 10k 1f v in boost sw fb shdn gnd lt3493 cmdsh-4e 0.1f tp0610l + ? lt3080 in v control out set 4.7f 0v to 10v ? 1a *differential voltage on lt3080 1.4v set by the tpo610l p-channel threshold. 1meg ? maximum output voltage is 2v below input voltage 200k 3080 ta17 r1 100k + ? lt3080 c comp * in v control set *c comp r1 10 10f r1 10 2.2f i out = 1v r1
lt3080 22 3080fc p ackage descrip t ion 3.00 0.10 (4 sides) note: 1. drawing to be made a jedec package outline m0-229 variation of (weed-1) 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on top and bottom of package 0.40 0.10 bottom view?exposed pad 1.65 0.10 (2 sides) 0.75 0.05 r = 0.125 typ 2.38 0.10 1 4 8 5 pin 1 top mark (note 6) 0.200 ref 0.00 ? 0.05 (dd8) dfn 0509 rev c 0.25 0.05 2.38 0.05 recommended solder pad pitch and dimensions apply solder mask to areas that are not soldered 1.65 0.05 (2 sides) 2.10 0.05 0.50 bsc 0.70 0.05 3.5 0.05 package outline 0.25 0.05 0.50 bsc dd package 8-lead plastic dfn (3mm 3mm) (reference ltc dwg # 05-08-1698 rev c) please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
lt3080 23 3080fc p ackage descrip t ion msop (ms8e) 0210 rev f 0.53 0.152 (.021 .006) seating plane note: 1. dimensions in millimeter/(inch) 2. drawing not to scale 3. dimension does not include mold flash, protrusions or gate burrs. mold flash, protrusions or gate burrs shall not exceed 0.152mm (.006") per side 4. dimension does not include interlead flash or protrusions. interlead flash or protrusions shall not exceed 0.152mm (.006") per side 5. lead coplanarity (bottom of leads after forming) shall be 0.102mm (.004") max 6. exposed pad dimension does not include mold flash. mold flash on e-pad shall not exceed 0.254mm (.010") per side. 0.18 (.007) 0.254 (.010) 1.10 (.043) max 0.22 ? 0.38 (.009 ? .015) typ 0.86 (.034) ref 0.65 (.0256) bsc 0 ? 6 typ detail ?a? detail ?a? gauge plane 1 2 3 4 4.90 0.152 (.193 .006) 8 8 1 bottom view of exposed pad option 7 6 5 3.00 0.102 (.118 .004) (note 3) 3.00 0.102 (.118 .004) (note 4) 0.52 (.0205) ref 1.68 (.066) 1.88 (.074) 5.23 (.206) min 3.20 ? 3.45 (.126 ? .136) 1.68 0.102 (.066 .004) 1.88 0.102 (.074 .004) 0.889 0.127 (.035 .005) recommended solder pad layout 0.42 0.038 (.0165 .0015) typ 0.65 (.0256) bsc 0.1016 0.0508 (.004 .002) ms8e package 8-lead plastic msop, exposed die pad (reference ltc dwg # 05-08-1662 rev f) detail ?b? detail ?b? corner tail is part of the leadframe feature. for reference only no measurement purpose 0.05 ref 0.29 ref ms8e package 8-lead plastic msop, exposed die pad (reference ltc dwg # 05-08-1662 rev f) please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
lt3080 24 3080fc q package 5-lead plastic dd-pak (reference ltc dwg # 05-08-1461) p ackage descrip t ion q(dd5) 0502 .028 ? .038 (0.711 ? 0.965) typ .143 +.012 ?.020 ( ) 3.632 +0.305 ?0.508 .067 (1.702) bsc .013 ? .023 (0.330 ? 0.584) .095 ? .115 (2.413 ? 2.921) .004 +.008 ?.004 ( ) 0.102 +0.203 ?0.102 .050 .012 (1.270 0.305) .059 (1.499) typ .045 ? .055 (1.143 ? 1.397) .165 ? .180 (4.191 ? 4.572) .330 ? .370 (8.382 ? 9.398) .060 (1.524) typ .390 ? .415 (9.906 ? 10.541) 15 typ .420 .350 .565 .090 .042 .067 recommended solder pad layout .325 .205 .080 .565 .090 recommended solder pad layout for thicker solder paste applications .042 .067 .420 .276 .320 note: 1. dimensions in inch/(millimeter) 2. drawing not to scale .300 (7.620) .075 (1.905) .183 (4.648) .060 (1.524) .060 (1.524) .256 (6.502) bottom view of dd-pak hatched area is solder plated copper heat sink please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
lt3080 25 3080fc p ackage descrip t ion t package 5-lead plastic to-220 (standard) (reference ltc dwg # 05-08-1421) t5 (to-220) 0801 .028 ? .038 (0.711 ? 0.965) .067 (1.70) .135 ? .165 (3.429 ? 4.191) .700 ? .728 (17.78 ? 18.491) .045 ? .055 (1.143 ? 1.397) .095 ? .115 (2.413 ? 2.921) .013 ? .023 (0.330 ? 0.584) .620 (15.75) typ .155 ? .195* (3.937 ? 4.953) .152 ? .202 (3.861 ? 5.131) .260 ? .320 (6.60 ? 8.13) .165 ? .180 (4.191 ? 4.572) .147 ? .155 (3.734 ? 3.937) dia .390 ? .415 (9.906 ? 10.541) .330 ? .370 (8.382 ? 9.398) .460 ? .500 (11.684 ? 12.700) .570 ? .620 (14.478 ? 15.748) .230 ? .270 (5.842 ? 6.858) bsc seating plane * measured at the seating plane please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
lt3080 26 3080fc p ackage descrip t ion st package 3-lead plastic sot-223 (reference ltc dwg # 05-08-1630) .114 ? .124 (2.90 ? 3.15) .248 ? .264 (6.30 ? 6.71) .130 ? .146 (3.30 ? 3.71) .264 ? .287 (6.70 ? 7.30) .0905 (2.30) bsc .033 ? .041 (0.84 ? 1.04) .181 (4.60) bsc .024 ? .033 (0.60 ? 0.84) .071 (1.80) max 10 max .012 (0.31) min .0008 ? .0040 (0.0203 ? 0.1016) 10 ? 16 .010 ? .014 (0.25 ? 0.36) 10 ? 16 recommended solder pad layout st3 (sot-233) 0502 .129 max .059 max .059 max .181 max .039 max .248 bsc .090 bsc please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
lt3080 27 3080fc information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa - tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. r evision h is t ory rev date description page number b 6/10 made minor updates to features and description sections revised line regulation conditions and note 2 made minor text edits in applications information section added 200k resistor to drawing 3080 ta19 in typical applications section updated package description drawings 1 3 9 20 21, 22 c 9/11 added i-grade information to the absolute maximum ratings section and the order information table. updated note 2. 2 3 (revision history begins at rev b)
lt3080 28 3080fc linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax : (408) 434-0507 www.linear.com ? linear technology corporation 2007 lt 0911 rev c ? printed in usa part number description comments ldos lt1086 1.5a low dropout regulator fixed 2.85v, 3.3v, 3.6v, 5v and 12v output lt1117 800ma low dropout regulator 1v dropout, adjustable or fixed output, dd-pak, sot-223 packages lt1118 800ma low dropout regulator ok for sinking and sourcing, s0-8 and sot-223 packages lt1963a 1.5a low noise, fast transient response ldo 340mv dropout voltage, low noise: 40v rms , v in = 2.5v to 20v, to-220, dd-pak, sot-223 and so-8 packages lt1965 1.1a low noise ldo 290mv dropout voltage, low noise 40v rms , v in = 1.8v to 20v, v out = 1.2v to 19.5v, stable with ceramic caps to-220, dd-pak, msop and 3mm 3mm dfn packages. lt c ? 3026 1.5a low input voltage vldo tm regulator v in : 1.14v to 3.5v (boost enabled), 1.14v to 5.5v (with external 5v), v do = 0.1v, i q = 950a, stable with 10f ceramic capacitors, 10-lead msop and dfn packages switching regulators lt1976 high voltage, 1.5a step-down switching regulator f = 200khz, i q = 100a, tssop-16e package ltc3414 4a (i out ), 4mhz synchronous step-down dc/dc converter 95% effciency, v in : 2.25v to 5.5v, v out(min) = 0.8v, tssop package ltc3406/ltc3406b 600ma (i out ), 1.5mhz synchronous step-down dc/dc converter 95% effciency, v in : 2.5v to 5.5v, v out(min) = 0.6v, i q = 20a, i sd < 1a, thinsot tm package ltc3411 1.25a (i out ), 4mhz synchronous step-down dc/dc converter 95% effciency, v in : 2.5v to 5.5v, v out(min) = 0.8v, i q = 60a, i sd < 1a, 10-lead ms or dfn packages paralleling regulators r ela t e d p ar t s typical a pplica t ion + ? lt3080 in v in 4.8v to 28v v control out 20m 10f v out 3.3v 2a 3080 ta18 165k set 1f + ? lt3080 in v control out 20m set

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